The invention relates generally to automatic test equipment and more particularly a high speed and high accuracy power supply for use with a semiconductor tester to provide precise voltage levels to a high-speed device-under-test (DUT).
Semiconductor device manufacturing typically includes test processes at both the wafer and packaged-device levels. The testing is normally carried out by automatic test equipment (ATE) that simulates a variety of operating conditions to verify the functionality of each device. As is well known in the art, semiconductor devices generally require a source of power in order to function.
Semiconductor devices such as microprocessors are designed to use minimal power when in xe2x80x9cstandbyxe2x80x9d operation, yet may consume hundreds of amperes of current when operating at maximum capability. In an ATE test environment, the current load drawn by a DUT, such as a microprocessor, can change from a few hundred milliamperes to over two hundred amperes in a few nanoseconds.
The voltage supplied to the DUT, VForce, must generally remain within a very tight tolerance during these DUT current load changes, to ensure optimum yields during test. Due to characteristics of the DUT circuitry, changes in VForce during the test can affect the measured performance of the DUT. Inaccurate test results are believed to contribute to an increase in product costs by reducing the yields of acceptable devices.
Conventionally, DUT power supplies implemented in ATE are installed either in a mainframe rack, or in a test head. DC force and sense lines running between the mainframe or test head to a DUT-mounted device board provide a precisely controlled voltage VForce to power the DUT. While this works well for relatively lower speed devices operating at relatively low currents, high-speed devices that draw large currents over very short response times experienced a phenomena known as xe2x80x9cdroopxe2x80x9d during maximum current demand intervals.
Generally, droop represents the drop in the voltage VForce supplied to the DUT following a rapid increase in current demand. Conventional ATE power supplies often lack the response time necessary to eliminate the droop associated with very high speed DUTs. Optimization of power supply accuracy and response time is a compromise. A highly accurate power supply will often have a relatively slow response time, while a power supply designed for fast response may have inadequate accuracy. In addition, the presence of inductance within the interconnections between the power supply and the DUT also produces a voltage droop at the DUT during current transients. This inductance is generally created by wafer probe needles, bond wires, package parasitics and other physical paths between the power supply and the actual die of the DUT. The ATE power supply has to overcome the impedance presented by these inductances in order to maintain VForce at a constant value during transient events.
The classic way to address the droop problem involves installing local bypass capacitors proximate the DUT. The capacitors store energy that can be used to compensate for droop until the power supply responds to the increased current demand. The capacitors, being closer to the DUT, have fewer parasitic inductances between them and the DUT. However, there are still some parasitic inductances remaining between these capacitors and the DUT, and these bypass capacitors can only supply current from a voltage equal to the established DUT voltage. Therefore, capacitors alone cannot eliminate the droop problem. In addition, it is difficult to place enough high quality capacitance on the device board to provide enough energy storage to adequately address the droop. Device boards typically have limited space available for these capacitors.
In ATE DUT power supply applications, high capacitances also often cause problems when, during testing, the operator or test program changes the programmed power supply voltage applied to the DUT. This might be done during ATE xe2x80x9cschmooxe2x80x9d testing, where the operating margins of a DUT are determined by varying frequency and voltage parameters. Such a change generally requires a substantial amount of energy to repeatedly charge and discharge the large capacitance. These charge/discharge cycles cause ripple currents in the capacitors, which may lead to overheating and premature failure.
Two proposals that allegedly address a problem similar to the voltage droop drawbacks experienced in ATE DUT power supply applications are found in U.S. Pat. Nos. 4,710,861 to Kanner and 6,046,577 to Rincon-Mora et al. Both proposals relate to power supplies, in general, and provide circuitry operative from the DUT supply voltage to raise or lower the voltage output in response to output supply level transients.
While these proposals are believed beneficial for their intended purposes, each derives its energy from the DUT power supply voltage, much like the classic capacitor construction described above. Additionally, because the proposed schemes employ voltage output devices, performance may be subject to undesirable inductive effects. As a result, the ability to overcome inductance and properly respond at high speed is limited.
What is needed and heretofore unavailable is a high-accuracy DUT power supply capable of addressing the droop problem without the use of large capacitors. Moreover, the need exists for such a high-accuracy power supply to simultaneously support high-speed and high-current DUTs. The DUT power supply of the present invention satisfies these needs.
The DUT power supply of the present invention provides high-speed voltage and current power supply performance to devices-under-test while maintaining stringent accuracy requirements. As a result, semiconductor device manufacturers can maximize device yields and correspondingly reduce test costs.
To realize the foregoing advantages, the invention in one form comprises a power supply for use with a semiconductor tester to power a device-under-test disposed on a device board. The power supply includes a remote high-accuracy DC power supply circuit, including respective force and sense lines, and also a local high-speed AC power supply circuit. The local AC power supply circuit includes an xe2x80x9cactive boostxe2x80x9d circuit having respective boost and sense lines coupled to the force and sense lines. The AC power supply boost circuit is operative to cooperate with the remote DC power supply circuit and, when the device-under-test demands a large dynamic current, provides the dynamic current until the remote DC power supply circuit responds to the current demand.
In another form, the invention comprises automatic test equipment for testing a device-under-test. The automatic test equipment includes a computer workstation and a test head coupled to the computer workstation. The test equipment further includes a device-under-test power supply including a high-accuracy DC power supply circuit having respective force and sense lines, and a high-speed AC power supply boost circuit. The AC power supply boost circuit has an active boost circuit including respective boost and sense lines coupled to the force and sense lines. The AC power supply boost circuit is operative to cooperate with the DC power supply circuit and, when the device-under-test demands a large dynamic current, provide the dynamic current until the DC power supply circuit responds to the current demand.
In yet another form the invention comprises a method of accurately supplying power to a high-speed device-under-test. The method includes the steps of forcing a DC current to the device-under-test along a DC force line at high accuracy from a DC power supply circuit having a predetermined response time; and boosting current from an active AC power supply boost circuit when current demand from the device-under-test changes faster than the predetermined DC power supply circuit response time.
Other features and advantages of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.